A | B | C | D | F | G | I | M | N | P | S | T | U

U: uADS1115_REG__CFG; uADS1115_REG_MAP; uAMG88_REG__AVERAGE; uAMG88_REG__FRAME_RATE; uAMG88_REG__INT; uAMG88_REG__INT_CONTROL; uAMG88_REG__STATUS; uAMG88_REG__STATUS_CLEAR; uAMG88_REG__TEMP; uAMG88_REG_MAP; uAPDS9930_CMD; uAPDS9930_REG__CONFIG; uAPDS9930_REG__CONTROL; uAPDS9930_REG__ENABLE; uAPDS9930_REG__PERSIST; uAPDS9930_REG__STATUS; uAPDS9930_REG_MAP; uAPDS9960_REG__CONFIG1; uAPDS9960_REG__CONFIG2; uAPDS9960_REG__CONFIG3; uAPDS9960_REG__CONTROL; uAPDS9960_REG__ENABLE; uAPDS9960_REG__GCONFIG1; uAPDS9960_REG__GCONFIG2; uAPDS9960_REG__GCONFIG3; uAPDS9960_REG__GCONFIG4; uAPDS9960_REG__GSTATUS; uAPDS9960_REG__PERSIST; uAPDS9960_REG__PULSE; uAPDS9960_REG__STATUS; uAPDS9960_REG_MAP; uAT42QT_REG__DEVICE_STATUS; uAT42QT_REG__KEY_DATA; uAT42QT_REG__SETUP_141_164; uAT42QT_REG__SETUP_165_188; uAT42QT_REG__SETUP_238; uAT42QT_REG__SETUP_241; uAT42QT_REG__SETUP_242; uAT42QT_REG__SETUP_243; uAT42QT_REG__SETUP_244; uAT42QT_REG__SETUP_248; uAT42QT_REG_MAP; uBMP180_REG__MEAS_CTRL; uBMP180_REG__OUT_LSB; uBMP180_REG__OUT_MSB; uBMP180_REG__OUT_XLSB; uDRV_CFG; uDRV_REG__ATV_CONTROL; uDRV_REG__CONTROL_1; uDRV_REG__CONTROL_2; uDRV_REG__CONTROL_3; uDRV_REG__CONTROL_4; uDRV_REG__CONTROL_5; uDRV_REG__FEEDBACK_CONTROL; uDRV_REG__GO; uDRV_REG__LIBRARY_SELECTION; uDRV_REG__MODE; uDRV_REG__STATUS; uDRV_REG__WAVEFORM_SEQUENCER; uDRV_REG_MAP; uGPMS_RD_REG_MAP; uGPMS_REG__STATUS; uGPMS_WR_REG_MAP; uMCP4725_REG__CMD; uMCP9808_REG__CFG; uMCP9808_REG__TEMP_AMB; uMCP9808_REG__TEMP_LIM; uMCP9808_REG_MAP; uMTCH_REG__CMD; uMTCH_REG__MODE; uMTCH_REG__MODE_CON; uMTCH_REG__TOUCHLSB; uMTCH_REG__TOUCHSTATE; uMTCH_REG__TOUCHX; uMTCH_REG__TOUCHY; uNCA9595_REG__CFG; uNCA9595_REG__IN; uNCA9595_REG__OUT; uNCA9595_REG__POL; uNCA9595_REG__PUP; uPCA9532_REG__INPUT; uPCA9532_REG__INPUT0; uPCA9532_REG__INPUT1; uPCA9532_REG__LS; uPCA9532_REG__LS0; uPCA9532_REG__LS1; uPCA9532_REG__LS2; uPCA9532_REG__LS3; uPCA9532_REG_MAP; uPCA9624_REG__LEDOUT; uPCA9624_REG__MODE1; uPCA9624_REG__MODE2; uPCA9624_REG_MAP; uPCA9685_REG__DUTY; uPCA9685_REG__MODE1; uPCA9685_REG__MODE2; uPCA9952_REG__EFLAG; uPCA9952_REG__LEDOUT; uPCA9952_REG__MODE1; uPCA9952_REG__MODE2; uPCA9956_REG__EFLAG; uPCA9956_REG__LEDOUT; uPCA9956_REG__MODE1; uPCA9956_REG__MODE2; uPCA9xxx_REG__EFLAG0; uPCA9xxx_REG__EFLAG1; uPCA9xxx_REG__EFLAG2; uPCA9xxx_REG__EFLAG3; uPCA9xxx_REG__EFLAG4; uPCA9xxx_REG__EFLAG5; uPCA9xxx_REG__EFLAGx; uPCA9xxx_REG__LEDOUT0; uPCA9xxx_REG__LEDOUT1; uPCA9xxx_REG__LEDOUT2; uPCA9xxx_REG__LEDOUT3; uPCA9xxx_REG__LEDOUT4; uPCA9xxx_REG__LEDOUT5; uPCA9xxx_REG__LEDOUTx; uPCF8523_REG__B_FREQ_CTRL; uPCF8523_REG__CLKOUT_CTRL; uPCF8523_REG__CTRL1; uPCF8523_REG__CTRL2; uPCF8523_REG__CTRL3; uPCF8523_REG__DAYS; uPCF8523_REG__HOURS; uPCF8523_REG__MINUTES; uPCF8523_REG__OFFSET; uPCF8523_REG__SECONDS; uPCF8523_REG__WEEKDAYS; uPCF8523_REG_MAP; uS11059_REG__CONTROL; uS11059_REG_MAP; uTCS3400_REG__AUX; uTCS3400_REG__CONFIG; uTCS3400_REG__CONTROL; uTCS3400_REG__ENABLE; uTCS3400_REG__IR; uTCS3400_REG__PERSIST; uTCS3400_REG__STATUS; uTCS3472_CMD; uTCS3472_REG__CONFIG; uTCS3472_REG__CONTROL; uTCS3472_REG__ENABLE; uTCS3472_REG__PERSIST; uTCS3472_REG__STATUS; uTCS3472_REG_MAP; uTMP1075_REG__CFGR; uTMP1075_REG__CFGR_WORD; uTSL2591_CMD; uTSL2591_REG__CONFIG; uTSL2591_REG__ENABLE; uTSL2591_REG__PERSIST; uTSL2591_REG__STATUS; uTSL2591_REG_MAP